Intel Staff CPU Uarch/RTL Engineer in Hillsboro, Oregon

Job Description

Component Design Engineers are responsible for the design and development of electronic components.

Responsibilities may include: the design of chip layout circuit design, circuit checking, device evaluation and characterization, documentation of specifications, prototype construction and checkout, modification and evaluation of semiconductor devices and components, performing developmental and/or test work, reviewing product requirements and logic diagrams, planning and organizing design projects or phases of design projects. Responds to customer/client requests or events as they occur. Develops solutions to problems utilizing formal education and judgment.

If you are passionate about seeing your ideas go from white board to billions of pieces of silicon, join Intel’s core design team in Hillsboro, Oregon. Our goal: to build a revolutionary microprocessor core to power the future of computing at Intel and create experiences we have yet to dream up.

We’re looking for micro-architecture, logic design and high-speed circuit design talent to help us reinvent the Core IP. Start the journey with us!

As an RTL/Uarch Design Engineer your responsibilities include but are not limited to:

Developing, designing, and delivering a microarchitecture or other significant aspect of a high performance-power efficient CPU core IP.

Analyzing multiple arch, uarch and circuit options to find the optimal design point considering power/performance/area/cost tradeoffs developing a functional block/unit RTL model, then integrating and validating. Planning and directing the circuit layout physical implementation and block integration.

Influencing program direction with technical proposals, analysis and recommendations.

As an ideal candidate you exhibit behavioral traits that indicate your: - Ability to use sound methods and data to test new ideas as well as the desire to have your own ideas be challenged by others.

  • Willingness to work with others in a highly complex decision space rife with ambiguity.

  • Ability to develop an implementation plan, monitor key indicators, and adjust resources and scope to deliver value on schedule.

  • Motivation to teach and mentor junior team members to become the rock-stars of tomorrow. - Propensity to thrive in a fast-paced, startup-like environment. - Strong verbal and written communication and collaboration skills

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Qualifications

Minimum Qualifications:

•Bachelors in Computer Engineering or Electrical Engineering with 5+ years of relevant work experience, or M.S. in Computer Engineering or Electrical Engineering with 2 years of relevant work experience in the following areas:

•Knowledge of computer architecture. - RTL Verilog, V2K, or System Verilog with a working knowledge of hardware modeling issues and logic debug environments.

•Modern energy-efficient/low-power logic design techniques, including those specifically applicable to high frequency optimization.

•Demonstrated success in one or more of the following areas: - Custom logic block design in a complex high-speed project

•Knowledge of various circuit design styles, including synthesis, custom, and memory RF

•Definition of high-speed digital circuit design rules and methods

A past technical leadership role including mentoring and schedule tracking

•Scripting in an interpreted language e.g. TCL, Perl, Python, Ruby.

Preferred Qualifications:

•Intel CPU/Microprocessor design experience.

•Design of high-speed logic blocks across a variety of design styles datapath, register file, synthesis.

•Research publications, patent filings, or other evidence of personal technical innovation in CPU/Microprocessor design.

•Relevant industry experience for 6+ years.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

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