Intel Design Automation Engineer in Hillsboro, Oregon
As part of the IP Handoff Solutions (IPHS) team, you will be critical to the future success of Intel. IPs and their exchange within Intel form the foundation of all of Intel's products. Intel's IPHS team is a research and development group that develops and delivers tools, flows, and methods for a complete IP handoff system. The IP handoff system includes IP quality validation using industry IP QA tooling, IP handoff and release, prototyping, and architecture exploration.
As part of this team, you will be developing and applying CAD software engineering methods, theories and research techniques in the investigation and solution of technical problems, assessing architecture and hardware limitations, planning technical projects in the design and development of CAD software, and defining and selecting new approaches and implementation of CAD software. IPHS is a highly exciting and challenging environment. We are exposed to a broad scope of mission critical SoC & IP challenges and are looking for qualified engineers with several soft skills including:
Willingness to act as ambassador for new technologies and actively engage with global cross-site teams
Willingness to work with others to both receive and provide technical coaching
Excellent communication and presentation skills
Willingness to prioritize, manage risks, evaluate tradeoffs, make quick decisions and communicate task status
Willingness to interface with multiple customers, understand their requirements, set expectations and deliver on commitments
Willingness to work with design teams developing advanced technologies using the best design and software practices
Analytical problem solving, team oriented and ability to work in a collaborative environment
Willingness to communicate effectively with various technical groups and to coordinate activities among those groups
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
The candidate must have a Bachelor’s in Electrical/Computer Engineering or Computer Science and 2+ years or experience -OR- a Master’s degree in Electrical/Computer Engineering or Computer Science and 1+ years of experience in:
- Linux, Python, Perl, TCL/Tk and Shell scripting
Experience with DesignSync & Perforce tools
Experience with SQL, MySQL, SQL Lite & MS SQL databases as well as the languages used to query and manipulate them
Experience with source control management tools (eg GIT)
Inside this Business Group
The Infrastructure and Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel's silicon design teams. IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation, and a best-in-class post silicon ecosystem that ramps quickly to high volume manufacturing and validation. Our primary mission is to protect Intel's brand by providing the infrastructure necessary to enable all of Intel's products to hit the market on a dependable and predictable cadence.
US, Arizona, Phoenix;US, California, Folsom;US, California, Santa Clara;US, Colorado, Fort Collins
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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