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Intel IP Hand-off CAD Engineer in Hillsboro, Oregon

Job Description

As part of the IP Handoff Solutions (IPHS) team, you will be critical to the future success of Intel. IPs and their exchange within Intel form the foundation of all of Intel's products. Intel's IPHS team is a research and development group that develops and delivers tools, flows, and methods for a complete IP handoff system. The IP handoff system includes IP quality validation using industry IP QA tooling, IP handoff and release, prototyping, and architecture exploration.

As part of this team, you will be developing and applying CAD software engineering methods, theories and research techniques in the investigation and solution of technical problems, assessing architecture and hardware limitations, planning technical projects in the design and development of CAD software, and defining and selecting new approaches and implementation of CAD software. IPHS is a highly exciting and challenging environment. We are exposed to a broad scope of mission critical SoC & IP challenges and are looking for qualified engineers with several soft skills including:

  • Willingness to act as ambassador for new technologies and actively engage with global cross-site teams

  • Willingness to work with others to both receive and provide technical coaching

  • Excellent communication and presentation skills

  • Willingness to prioritize, manage risks, evaluate tradeoffs, make quick decisions and communicate task status

  • Willingness to interface with multiple customers, understand their requirements, set expectations and deliver on commitments

  • Willingness to work with design teams developing advanced technologies using the best design and software practices

  • Analytical problem solving, team oriented and willing to work in a collaborative environment

  • Willingness to communicate effectively with various technical groups and to coordinate activities among those groups


Please note: Due to the effects of COVID-19, Intel has a strict work-from-home policy which this position must adhere to. You will be required to work from your current home address until it is deemed safe to return to an Intel site. Presently, there are no plans to return to the office until June 2021. Updates will be provided ongoing as circumstances change.

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

The candidate must have a Master’s degree in Electrical/Computer Engineering or Computer Science and 2+ years of experience in:

  • Linux, and experience in Python or Perl

  • Good software engineering practices

  • Source control management

Preferred Qualifications

  • Jira experience

  • Perforce and/or GIT experience

  • Experience with Hard IP, Standard cell library and IO validation

  • Crossfire experience

Inside this Business Group

The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Other Locations

US, California, Folsom;US, California, Santa Clara;US, Texas, Austin

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.