Intel SoC Design Engineer – Pre-Silicon Integration Validation or Security Validation or Emulation Build in Hillsboro, Oregon

Job Description

Come join Intel's Silicon Engineering Group organization in Pre-Silicon Validation. In this role you will be working as part of a pre-silicon validation team for future Intel SoCs or IPs.

Your responsibilities will include but not be limited to:

  • Validation of an IP or feature, either directly or at the system level

  • Creating plans and tests for validating portions of a complex microarchitecture using written specs, RTL code and other tests as a guide

  • Learning the architecture and microarchitecture by debugging failures to the root cause

  • Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design

  • Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models

  • Engaging with IP providers and customers to define, develop and deliver necessary infrastructure and address issues found during execution

  • Developing tools and methods to streamline IP development and SOC integration to deliver highest quality in shortest time possible

  • Developing debugging tools and software

Additional responsibilities for Security Validation

  • Analyze, interpret and assess HW and FW architectural specifications to define security requirements for IP/SoC designs

  • Review new IP/SoC HW/FW architecture to drive upstream design development to meet product security objectives

  • Contribute to downstream post-silicon and platform security validation as well as actively participate in customer security matters

Additional responsibilities for Emulation Build

  • Building multiple emulation targets for an SoC

  • Adding support for new features/IPs into existing emulation models

Qualifications

  • Bachelor of Science or Masters of Science in Computer Science, Computer Engineering, or Electrical Engineering

  • 3+ years of experience with reading and interpreting technical specs and Register Transfer Level (RTL) code

  • 3+ years of experience working on IP or SoC development, verification, or integration using Verilog/System Verilog/OVM/UVM3+ years of experience writing validation plans and software to implement those validation plans

  • 1+ years of experience with UNIX* or Linux*

  • Security Validation Only

  • Experienced in IP/SOC product development lifecycle (PLC) and Security Development Lifecycle (SDL)

  • Familiarity with Intel x86 core, chipset and platform architectures (BIOS, Patches, Drives, OSes) as well as Intel product security features

  • Expertise in verification methodologies such as ace/sandbox for model build, validation language (UVM/OVM/Saola) and architecture to build future proof scalable validation environments and test content

  • Emulation Build Only

  • 1 year of experience building or enhancing emulation models

  • Preferred Qualifications

  • 1 year experience with computer architecture

  • 1 year experience with IA-32 assembly and/or Verilog* programming experience

  • 3 years of experience with validation or testing experience, especially in a silicon design team

Inside this Business Group

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance....